? 2000 in?eon technologies corp. ?optoelectronics division ?san jose, ca www.in?eon.com/opto ?1-888-in?eon (1-888-463-4636) osram opto semiconductors gmbh & co. ohg ?regensburg, germany www.osram-os.com ?+49-941-202-7178 1 may 31, 2000-13 package thirty-?e dots form a 0.48 x 0.68 inch overall character size in a 0.700 x 0.800 inch dual-in-line package. the ?0 degree wide viewing angle complements the large display and is the ideal display for industrial control applications. display construction is ?led re?ctor type with the intregrated circuit in the back also ?led with ic-grade epoxy. this results in a very rugged part which is resistant to moisture, shock, and vibration. figure 2. physical dimensions in inches (mm) siemens yyww dlo7135 z pin 1 indicator device marking begins over pin 1 .800 (20.32) .125 (3.18) 1.00 (2.54) typ. .295 (7.49) .018 (.45) sq. .325 (8.26) eia date code .080 (2.03) diam. ref. .075 (1.91) ref. .150 (3.81) .100 (2.54) typ. .700 (17.78) .50 (12.70) ref. .600 (15.24) dlo7135 z luminous intensity code 1.00 (2.54) typ. .050 (1.27) .48 (12.19) .68 (17.27) .160 (4.06) this application note is intended to serve as a design and appli- cation guide for users of the dlo7135 and dlg7137 osram intelligent displays. this appnote covers device electrical description, operation, general circuit design considerations and interfacing to microprocessors. electrical description the DLX713X intelligent alphanumeric 5x7 dot matrix display contains memory, character generator, multiplexing circuits, and drivers built into a single package. figure 1 is a block diagram of the DLX713X. the unit consists of 35 led die arranged in a 5x7 pattern and a single cmos integrated circuit chip. the ic chip contains the column drivers, row drivers, 128 character generator rom, memory, multiplex and blanking circuitry. figure 1. DLX713X block diagram d0 d1 d2 d3 d4 d5 d6 column driver multiplex circuitry memory character rom row driver wr ce bl0 bl1 l1 the DLX713X, 5x7 dot matrix intelligent display device appnote 25
? 2000 in neon technologies corp. optoelectronics division san jose, ca appnote 25 www.in neon.com/opto 1-888-in neon (1-888-463-4636) osram opto semiconductors gmbh & co. ohg regensburg, germany www.osram-os.com +49-941-202-7178 2 may 31, 2000-13 table 1. electrical inputs table 2. pin description operation in a dot matrix display system, it is advantageous to use a mul- tiplexed approach with 12 drivers (5 digit plus 7 segments) rather than 35 segment drivers, reducing the number of drives and interconnections required. a multiplexed system must be a synchronous system or the digits or elements may have differ- ent on (lit) times and therefore varying brightness. the DLX713X is an internally multiplexed display but the data entry is asynchronous. loading data is similar to writing into a ram. present the data, select the chip, and give a write signal. for a multidigit system, each digit has its own unique location and will display its contents until replaced by another code. the waveforms of figure 4 demonstrates the relationship of the signals required to generate a write cycle. check the data sheet for minimum values required for each signal. pin name pin name 1v cc 14 d6 data input (msd) 2l t lamp test 13 d5 data input 3ce chip enable 12 d4 data input 4wr write 11 d3 data input 5 bl1 brightness 10 d2 data input 6 bl0 brightness 9 d1 data input 7 gnd 8 d0 data input (lsd) v cc positive supply +5 v gnd ground d0?6 data lines, see figure 3 (character set) ce chip enable (active low) determines which device in an array will accept data wr write (active low) data and chip enable must be present and stable before and after the write pulse (see DLX713X data sheet for timing) bl0 , bl1 blanking control input (active low) used to control level of display brightness l t lamp test (active low) causes all dots to light at 1/2 brightness figure 3. character set figure 4. timing characteristics display blanking and dimming the DLX713X intelligent display has the capability of three levels of brightness plus blank. figure 5 shows the combina- tion of bl0 and bl1 for the different levels of brightness. the bl0 and bl1 inputs are independent of write and chip enable and does not affect the contents of the internal memory. a ?shing display can be achieved by pulsing the blanking pins at a 1? hertz rate. either bl0 or bl1 should be held high to light up the display. table 3. dimming and blanking control brightness level bl1 bl0 blank 0 0 1/7 brightness 0 1 1/2 brightness 1 0 full brightness 1 1 ascii code d0 d1 d2 d3 0 0 0 0 0 1 0 0 0 1 0 1 0 0 2 1 1 0 0 3 0 0 1 0 4 1 0 1 0 5 0 1 1 0 6 1 1 1 0 7 0 0 0 1 8 1 0 0 1 9 0 1 0 1 a 1 1 0 1 b 0 0 1 1 c 1 0 1 1 d 0 1 1 1 e 1 1 1 1 f 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 2 3 4 5 6 7 d6 d5 d4 hex 1. high=1 level. 2. low=0 level. t w t ds t ces ce wr d0-d6 t dh
? 2000 in neon technologies corp. optoelectronics division san jose, ca appnote 25 www.in neon.com/opto 1-888-in neon (1-888-463-4636) osram opto semiconductors gmbh & co. ohg regensburg, germany www.osram-os.com +49-941-202-7178 3 may 31, 2000-13 lamp test the lamp test when activated causes all dots on the display to be illuminated at 1/7 brightness. it does not destroy any previ- ously stored characters. the lamp test function is independent of chip enable, write, and the settings of the blanking inputs. this convenient test gives a visual indication that all dots are functioning properly. because lamp test does not affect the display memory, it can be used as a cursor or pointer in a line of displays. general design considerations when using the DLX713X on a separate display board having more than six inches of cable length, it may be necessary to buffer all of the input lines. a non-inverting 74ls244 buffer can be used. the object is to prevent transient current into the DLX713X protection diodes. the buffers should be located on the display board and as close to the displays as possible. because of high switching currents caused by the multiplex- ing, local power supply bypass capacitors are also needed in many cases. these should be 10 volt, tantalum type having 10 uf capacitance. the capacitors may only be required every 2 displays depending on the line regulation and other noise generators. decoupling capacitors should also be used across v cc and ground of each display. typical value of these capacitors is 0.01 mf/10 v. if small wire cables are used it is good engineering practice to calculate the wire resistance of the ground and the +5 volt wires. more than 0.2 volt drop (at 100 ma per digit) should be avoided, since this loss is in addition to any inaccuracies or load regulation of the power supply. the 5 volt power supply for the DLX713X should be the same one supplying the v cc to all logic devices. if a separate supply must be used then local buffers should be used on all the inputs and these buffers should be powered from the display power supply. this precaution is to avoid line transients or any logic signals to be higher than v cc during power up. interfacing for an eight digit display using the DLX713X, interfacing to a single chip microprocessor is easy and straight forward. figure 5. block diagram of the intel 8031 controller conclusion note that although other manufacturers?products are used in the examples, this application note does not imply speci? endorsement, or warranty of other manufacturers?products by osram. the interface schemes shown demonstrate the sim- plicity of using the DLX713X dot matrix intelligent display. slight timing differences may be encountered for various microproces- sors, but can be resolved similar to those encountered when using different ram s. the techniques used in the examples were shown for their generality. the user will undoubtedly invent other schemes to optimize his particular system to its require- ments. 8 8 3 8 8 latch buffer eprom 27xx decoder d d 7 p3.0 p3.1 p3.2 p3.6 p ale 8031 74373 a0-a7 74ls244 74ls138 oe psen x x x x x bl bl1 lt wr ce bl bl1 lt wr ce
? 2000 in neon technologies corp. optoelectronics division san jose, ca appnote 25 www.in neon.com/opto 1-888-in neon (1-888-463-4636) osram opto semiconductors gmbh & co. ohg regensburg, germany www.osram-os.com +49-941-202-7178 4 may 31, 2000-13 program listing 1 ; by dan watson 2 ; to do lamp test,set 100% brightness 3 ; and write ?iemens* 4 5 ; p3.0 = blo\ 6 ; p3.1 = bl1\ 7 ; p3.2 = lt\ 8 ; p3.6 = wr\ 9 10 ; ro = digit address ( chip enables ?ce\ ) 11 ; r1 = digit counter 12 ; r7 = r6 = r5 = wait registers 13 14 0000 .org 00h 15 0000 02 00 03 init:jmp begin 16 0003 12 00 24 begin:call wait1 ; delay for uc to stabilize 17 0006 75 b0 00 mov p3,#00h ; lamp test 18 0009 12 00 24 call wait1 ; display lt\ for a while 19 000c 75 b0 07 mov p3,#07h ; set all 8 displays to 100% brt 20 000f 00 nop 21 0010 00 nop 22 0011 78 00 mov r0,#00h ; digit 7 address 23 0013 79 08 mov r1,#08h ; 8 digit counter 24 0015 74 00 mov a,#00h ; clear acc. 25 0017 90 00 37 mov dptr,#text ; address of the message 26 001a 93 wrt:movc a,@a+dptr ; load first char. into the acc. 27 001b f2 movx @r0,a ; digit address and data write 28 001c a3 inc dptr ; next character address 29 001d 08 inc r0 ; next digit (6) address 30 001e e4 clr a 31 001f d9 f9 djnz r1,wrt ; write all 8 char. 32 0021 00 go:nop 33 0022 01 21 jmp go ; message always on 34 0024 35 0024 36 0024 7f 88 wait1:mov r7,#88h ; delay loops 37 0026 00 nop 38 0027 7e ff wait2:mov r6,#ffh 39 0029 00 nop 40 002a 7d ff wait3:mov r5,#ffh 41 002c 00 nop 42 002d dd fe djnz r5,$ 43 002f 00 nop 44 0030 de f8 djnz r6,wait3 45 0032 00 nop 46 0033 df f2 djnz r7,wait2 47 0035 00 nop 48 0036 22 ret 49 50 0037 53 49 45 4d 45 text:db ?iemens* 003c 4e 53 2a 51 003f 52 003f .end
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